er will
operate properly over the normal range of room temperature.

The Central Processor and memory together require thirty amperes of 110
volts single phase 60 cycle ac. Each inactive tape transport requires
two amperes and the one active transport requires 10 amperes.

CENTRAL PROCESSOR

The Central Processor of PDP-3 contains the Control Element, the Memory
Buffer Register, the Arithmetic Element, and the Memory Addressing
Element. The Control Element governs the complete operation of the
computer including memory timing, instruction performance, and the
initiation of input-output commands. The Arithmetic Element, which
includes the Accumulator, the In-Out Register, and the Carry Storage
Register, performs the arithmetic operations. The Memory Addressing
Element which includes the Index Adder, the Program Counter, and the
Memory Address Register, performs address bookkeeping and modification.

OPERATING SPEEDS

Operating times of PDP-3 instructions are normally multiples of the
memory cycle of 5 microseconds. Two cycle instructions refer twice to
memory and thus require 10 microseconds for completion. Examples of this
are add, subtract, deposit, load, etc. One cycle instructions do not
refer to memory and require 5 microseconds. Examples of the latter are
the jump instructions, the skip instructions, and the operate group. The
operating times of variable cycle instructions depend upon the
instruction. For example, the operating time for a shift or rotate
instruction is 5 +0.2N microseconds, where N is the number of shifts
performed. The operating times for multiply and divide are functions of
the number of ones in the multiplier and in the quotient, respectively.
Maximum time for multiply is 25 microseconds. This includes the time
necessary to get the multiply instruction from memory. Divide takes 90
microseconds maximum.

In-Out Transfer instructions that do not include the optional wait
function require 5 microseconds. If the in-out device requires a wait
time for completion, the operating time depends upon the device being
used.

If an instruction includes reference to an index register, an additional
5 microseconds is required. Each step of indirect addressing also
requires an additional 5 microseconds.

INSTRUCTION FORMAT

The instructions for PDP-3 may be divided into three classes:

1. Indexable memory instructions
2. Non-indexable memory instructions
3. Non-memory instruction