rogram Counter_ (5 usec.)
jsp x Y Operation Code 62

The contents of the Program Counter are transferred to the Index Adder.
When the transfer takes place, the Program Counter holds the address of
the instruction following the jsp. The Program Counter is then reset to
address Z. The next instruction that will be executed will be taken from
memory register Z.

_Skip if Accumulator and Z differ_ (10 usec.)
sad x Y Operation Code 50

The C(Z) are compared with the C(AC). If the two numbers are different,
the Program Counter is indexed one extra position and the next
instruction in the sequence is skipped. The C(AC) and the C(Z) are
unaffected by this operation.

_Skip if Accumulator and Z are the same_ (10 usec.)
sas x Y Operation Code 52

The C(Z) are compared with C(AC). If the two numbers are identical, the
Program Counter is indexed one extra position and the next instruction
in the sequence is skipped. The C(AC) and C(Z) are unaffected by this
operation.

Non-Indexable Memory Instructions

These instructions have the same word format as the indexable
instructions. Since they operate on the index register location, x, they
cannot be indexed.

_Skip on Negative index_ (10 usec.)
snx x Y Operation Code 46

The number in octal digits 7 through 11 of the instruction word is added
to the C(x). This addition is done in the 15 bit Index Adder using 1's
complement arithmetic. If, after the addition, the sum is negative, the
Program Counter is advanced one extra position and the next instruction
in the sequence is skipped. The contents of octal digits 0-5 of the
index register location are unaffected by this instruction.

_Skip on Positive index_ (10 usec.)
spx x Y Operation Code 44

The number in octal digits 7 through 11 of the instruction word is added
to the C(x). This addition is done in the 15 bit Index Adder using 1's
complement arithmetic.

If, after the addition, the sum is positive, the Program Counter is
advanced one extra position and the next instruction in the sequence is
skipped. The contents of octal digits 0-5 of the index register location
are unaffected by this instruction.

_Load Index Register_ (10 usec.)
lir x Y Operation Code 14

The octal digits 7 through 11 (Y) of the instruction will replace the
corresponding digits of the memory register specified by x. Octal digit
6 of the memory register will be left clear. Digits 0-5 of the memory
register are unc