information will remain
at the gate for a relatively long time by virtue of the slow mechanical
action. A program designed to accept typed-in data would periodically
check the status of Program Flag One. If at any time Program Flag One is
found to be set, an In-Out Transfer instruction with address four must
be executed for information to be transferred. This In-Out Transfer
normally should not use the optional in-out halt. The information
contained in the Typewriter's coder is then read into the right six bits
of the In-Out Register.

OPTIONAL INPUT-OUTPUT

The PDP-3 is designed to accommodate a variety of input-output
equipment. Of particular interest is the ease with which new, and
perhaps unusual, external equipment can be added to the machine.
Optional in-out devices include Cathode Ray Tube Display, Magnetic Tape,
Real Time Clock, Line Printer and Analog to Digital Converters. The
method of operation of PDP-3 with these optional devices is similar to
the standard input-output equipment.

SEQUENCE BREAK SYSTEM

An optional in-out control is available for PDP-3. This control, termed
the Sequence Break System, allows concurrent operation of several in-out
devices and the main sequence. The system has, nominally, 16 automatic
interrupt channels arranged in a priority chain.

A break to a particular sequence may be initiated by the completion of
an in-out device, the program, or an external signal. If this sequence
has priority, the C(AC), C(IO), C(PC), and C(IA) are stored in three
fixed memory locations unique to that sequence. Since the C(PC) and
C(IA) are eighteen bits each, these two registers are stored in one
memory location. The next instruction is taken from a fourth location.
This instruction is usually a jump to a suitable routine. The program is
now operating in the new sequence. This new sequence may be broken by a
higher priority sequence. A typical program loop for handling an in-out
sequence would contain 3 to 5 instructions, including the appropriate
iot. These are followed by load AD and load IO from the fixed locations
and a special indirect jump through the location of the previous C(PC).
This special jump also loads the IA. This last instruction terminates
the sequence.

HIGH SPEED IN-OUT CHANNEL

The device connected to an in-out channel communicates directly with
memory through the Memory Buffer Register. At the completion of each
machine instruction, a check is made to see if