purposes.

_Sense Switches_ - There are six switches on the Console which are
present for manual intervention.

STORAGE

The internal Memory System for PDP-3 consists of modules of 4096 words
of coincident current magnetic core storage. Each word has 36 bits. The
memory modules operate with a read-rewrite cycle time of 5 microseconds.
The driving currents of the memory are automatically adjusted to
compensate for normal room temperature variations.

Each core memory module consists of the memory stack, the required X and
Y switches, the X and Y current sources and sense amplifiers for that
stack.

The Memory Address Register, the Memory Buffer Register, and the Memory
Timing Controls are considered to be part of the Central Processor. The
standard PDP-3 Memory Address Register configuration is built to allow
up to 8 modules of core memory (32,768 words). There is a space in the
addressing section of the machine to allow expansion of the addressing
by a factor of eight for a total addressing capacity of 262,144 memory
registers.

The Core Memory may be supplemented by Magnetic Tape Storage. This is
described under Input-Output.

STANDARD INPUT-OUTPUT

The PDP-3 is designed to accommodate a variety of input-output
equipment. Standard input-output units include a Paper Tape Reader,
Paper Tape Punch and an Electric Typewriter.

A single instruction, In-Out Transfer (see Central Processor), performs
all in-out operations through the 36 bit In-Out Register. The address
portion of this instruction specifies the in-out function. One bit of
the instruction selects an in-out halt as required.

PAPER TAPE READER

The Paper Tape Reader of the PDP-3 is a photoelectric device capable of
reading 300 lines per second. Six lines form the standard 36 bit word
when reading binary punched eight hole tape. Five, six and seven hole
tape may also be read.

The reader will operate in one of two basic modes or in a third special
mode.

Alphanumeric Mode
rpa iot 1

In this mode, one line of tape is read for each In-Out Transfer. All
eight holes of the line are read. The information is left in the right
eight bits of the In-Out Register, the remainder of the register being
left clear. The standard PDP alphanumeric paper tape code includes an
odd parity bit which may be checked by the program. Tape of non-standard
width would be read in this mode.

Binary Mode
rpb iot 2

For each In-Out Transf